Handheld
The iVeia Handheld Development Kit provides a platform for integration into your low power application. The iVeia Processing Module combined with a GigaFlex I/O Module provides a modular solution to support the majority of today’s handheld processing requirements while maintaining a form factor suitable for handheld devices.
iVeia’s Velocity-EHF™ development suite, libraries, and IP, simplify development of hybrid software and FPGA applications. The Velocity-EHF includes a simplified FPGA framework and software libraries for managing interfaces between the FPGA and the processor. iVeia’s Zero-copy Application Ports (ZAP) provide low-latency high-speed transfer of both in-band and out-of-band data between the user FPGA application and the software application. An Open Cores Protocol (OCP) master interface in the FPGA allows the user to implement custom peripherals or utilize iVeia’s (or other freely available) OCP cores and associated libraries. iVeia provides a memory-mapped OCP register bank and memory interfaces to simplify the user FPGA design. For users unfamiliar with FPGA design, iVeia provides turn-key FPGA designs that abstract the FPGA from the software application.
Product GPP FPGA
DSP Capability Memory High Speed I/O Handheld Carrier Board
Technology Max Speed Technology Denisty Technology Max Speed Product
Atlas-I-LPe TI OMAP 3530 or DM3730 (Single ARM Cortex-A8) UP to 1.0 GHz Xilinx Spartan-6 Up to LX45 (45K Logic Cells; 58 DSP Slices; 260 KB Block RAM TI C64x Core, ARM NEON Extensions 600 MHz Up to 1GB LPDDR-333 Optional GigE (RGMII) Arcadia
Atlas-I-Z7e Xilinx (Dual ARM Cortex-A9) Up to 800 MHz Xilinx Zynq-7000 EPP 7020 (Artix) (85K Logic Cells; 220 DSP Slices; 560KB Block RAM) Up to 1GB LPDDR2-800* Optional GigE (RGMII) Arcadia
